Yijiahao (Friedrich) Qi
Ithaca, NY
- Ph.D. student Electrical & Computer Engineering, Cornell University
- B.S. in Applied Physics Peking University
I work on optimizing large-scale GPU systems for more efficient machine learning systems.
I am a 1st-year PhD student in the Computer System Lab of ECE Department at Cornell University. Before joining Cornell, I received my B.S. in Applied Physics from Peking University (EECS Department) in 2026, advised by Prof. Meng Li. During my undergraduate studies, I spent a year as a research intern in the SHARC Lab at Georgia Tech, working with Prof. Cong (Callie) Hao on efficient Mixture-of-Agents (MoA) serving systems.
Recent papers
- 2022 Peking University B.S. in Applied Physics
- 2025 Georgia Tech Undergraduate Research Intern, SHARC Lab
- 2026 Now Cornell University Ph.D. in Electrical and Computer Engineering
Experience
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Undergraduate Research Intern, SHARC Lab
Georgia Institute of Technology
With Prof. Cong (Callie) Hao on efficient Mixture-of-Agents serving (Faster-MoA).
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Undergraduate Researcher, SEC Lab
Peking University
With Prof. Meng Li on reliable embodied AI (CREATE) and efficient VLA inference (DySL-VLA).
Education
News
- Fall 2026
Started my Ph.D. in Electrical and Computer Engineering at Cornell University, in the Computer Systems Lab.
- Jul 2026
Received my B.S. in Applied Physics from Peking University (EECS Department).
- 2026
Faster-MoA (co-first author) and DySL-VLA were published at DAC 2026.
- 2026
CREATE (co-first author) was published at ASPLOS 2026.
Earlier updatesShow fewer
- Mar 2025
Joined the SHARC Lab at Georgia Tech as an undergraduate research intern with Prof. Cong (Callie) Hao.
Skills
- Languages & frameworks
- C++
- Python
- PyTorch
- Verilog
- Tools
- Vivado
- Vitis
- Linux
- Git
- Docker
Research Interests
Optimizing large-scale GPU systems for more efficient machine learning systems.
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Efficient agentic systems
Agentic systemsAchieving lower serving latency via co-designing scheduling policy and universal memory management.
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Hardware-aware system/algorithms design
Hardware-aware designDesigning tailored system/algorithms on resource-constrained platforms to enable higher performance.
Hands-on experience
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Efficient embodied agents
Fault-tolerant embodied AI (CREATE) and robotic-manipulation acceleration (DySL-VLA).
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Algorithms
PEFT fine-tuning of small models with LLaMA-Factory; customized metrics for dynamic early exit.
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Systems
KV-cache management and transmission; prefill–decode scheduling and partitioning in multi-agent serving.
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Hardware
Sparse matrix-matrix multiplication (SpMM) accelerator and systolic-array design in Verilog.
Selected Publications
Papers from my undergraduate research at Peking University and Georgia Tech. * Equal contribution.